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专利名称: FF总线帧类型识别器
其他题名: FF (foundation field) bus frame type recognizer
作者: 杨志家; 段茂强; 崔书平; 谢闯; 董策; 王剑
所属部门: 工业信息学研究室
专利权人: 中国科学院沈阳自动化研究所
专利代理: 沈阳科苑专利商标代理有限公司 21002
专利国别: 中国
专利类型: 发明
专利状态: 有效
摘要: 本发明涉及一种FF总线帧类型识别器,设于FF现场总线数据链路层中,包括:帧控制字译码和目的地址接收模块,将接收的来自现场总线的数据信号生成帧控制信息、地址匹配结果和数据链路层协议数据单元的相关参数,转发给数据链路层的上层处理单元;地址匹配模块,将接收到的数据链路层中的地址表数据以及通过转换电路接收的地址数据有效指示信号进行地址匹配处理,输出至数据链路层的上层处理单元;转换电路,用于将地址数据有效指示信号进行时序调整,送至地址匹配模块。本发明可以实时提取DLPDU的种类信息;可以识别DLPDU的长地址或短地址;可以提取DLPDU的地址信息;可以FPGA、CPLD、IP等多种方式实现。
英文摘要: The invention relates to a FF (foundation field) bus frame type recognizer arranged in a data link layer of a FF field bus. The FF bus frame type recognizer comprises a frame controlled word coding and target address receiving module, an address matching module, and a conversion circuit, wherein the frame controlled word coding and target address receiving module is used for generating frame control information, an address matching result and relevant parameters of a protocol data unit of the data link layer based on data signals received from the field bus and sending the frame control information, the address matching result and the relevant parameters of the protocol data unit of the data link layer to an upper processing unit of the data link layer the address matching module is used for carrying out address matching processing on received address table data in the data link layer and an address data available indicating signal received through the conversion circuit and outputting to the upper processing unit of the data link layer and the conversion circuit is used for carrying out timing adjustment on the address data available indicating signal and sending the adjusted address data available indicating signal to the address matching module. The invention can extract the type information of a DLPDU (data link protocol data unit), can identify the long address or the short address of the DLPDU, can extract the address information of the DLPDU, and can be implemented in various modes of FPGA (field programmable gate array), CPLD (complex programmable logic device), IP (internet protocol) and the like.
是否PCT专利:
申请日期: 2008-12-19
公开日期: 2010-06-23
授权日期: 2012-07-04
专利申请号: CN200810229995.3
公布/公告号: CN101753543A
语种: 中文
产权排序: 1
内容类型: 专利
URI标识: http://ir.sia.cn/handle/173321/12794
Appears in Collections:工业信息学研究室_专利

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