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Lot release strategy semiconductor assembly and testing based on the degree of constraint of the minimum spanning tree
Zhang GH(张国辉); Liu C(刘昶); Yao LL(姚丽丽); Shi HB(史海波)
作者部门数字工厂研究室
会议名称26th Chinese Control and Decision Conference, CCDC 2014
会议日期May 31, 2014 - June 2, 2014
会议地点Changsha, China
会议录名称26th Chinese Control and Decision Conference, CCDC 2014
出版者IEEE Computer Society
出版地Washington, DC
2014
页码1735-1739
收录类别EI ; CPCI(ISTP)
EI收录号20143218039301
WOS记录号WOS:000343577701170
产权排序2
ISBN号978-1-4799-3706-6
关键词Graph Theory
摘要The production of semiconductor assembly and testing is wide variety, and the cost of produce time of switch between different products is not the same, which could lead to its utilization is lower, production cycle longer. Thus lot release control plays an important role for improving utilization and shorter production cycle for semiconductor assembly and testing system. In this paper, we modeled as a graph theory for solving constrained minimum spanning tree problem. Using mainstream Prim algorithm, we solve it to give each product sequence and specific lot release time. It have solved the extra time problem that caused by blinding lot release, and finally, through applied research we verified the effectiveness and superiority of it. The proposed strategy can reduce the change machine costs, shorten production cycle and improve production efficiency. © 2014 IEEE.
语种英语
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被引频次:1[WOS]   [WOS记录]     [WOS相关记录]
文献类型会议论文
条目标识符http://ir.sia.cn/handle/173321/15144
专题数字工厂研究室
作者单位1.Chinese Academy of Sciences RandD Center for Internet of Things, China
2.Jiangsu RandD Center for Internet of Things, China
3.WUXI CAS UBIQUITIOUS INFORMATION TECHNOLOGY RandD CENTER CO., LTD, China
4.SHENYANG INSTITUTE of AUTOMATION CHINESE ACADEMY of SCIENCES, China
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Zhang GH,Liu C,Yao LL,et al. Lot release strategy semiconductor assembly and testing based on the degree of constraint of the minimum spanning tree[C]. Washington, DC:IEEE Computer Society,2014:1735-1739.
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