The invention relates to a clock state indicating circuit. The clock state indicating circuit includes a clock frequency dividing circuit, an edge correction circuit, an edge detection circuit and a shift register circuit, wherein the clock frequency dividing circuit is connected with the edge correction circuit, the edge correction circuit is connected with the edge detection circuit and the shift register circuit, and the edge detection circuit is connected with the shift register circuit. The method includes the following steps that: different frequency division clock signals and periodic reset signals are generated; and a clock state is indicated through the shift and reset operation of a shift register. According to the circuit of the invention, when frequency-halving is adopted, at least six flip flops and two gate circuits can be adopted to realize a clock state indicating function. The clock state indicating circuit has the advantages of simple structure, lower operation power consumption and the like.