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一种时钟状态指示电路及方法
Alternative TitleClock state indicating circuit and method
谢闯; 杨志家; 王剑; 董策; 段茂强; 吕岩; 张超
Department工业控制网络与系统研究室
Rights Holder中国科学院沈阳自动化研究所
Patent Agent沈阳科苑专利商标代理有限公司 21002
Country中国
Subtype发明
Status有权
Abstract

本发明涉及一种时钟状态指示电路,包括时钟分频电路、边沿修正电路、边沿检测电路和移位寄存器电路;所述时钟分频电路与边沿修正电路连接;所述边沿修正电路与边沿检测电路、移位寄存器电路连接;所述边沿检测电路与移位寄存器电路连接;其方法为生成不同的分频时钟信号和周期复位信号,通过移位寄存器的移位和复位操作指示时钟状态。本发明电路当采用2分频时,最小可采用六个触发器和二个门电路即可以实现时钟状态指示功能,具有结构简单、运行功耗小等优点。

Other Abstract

The invention relates to a clock state indicating circuit. The clock state indicating circuit includes a clock frequency dividing circuit, an edge correction circuit, an edge detection circuit and a shift register circuit, wherein the clock frequency dividing circuit is connected with the edge correction circuit, the edge correction circuit is connected with the edge detection circuit and the shift register circuit, and the edge detection circuit is connected with the shift register circuit. The method includes the following steps that: different frequency division clock signals and periodic reset signals are generated; and a clock state is indicated through the shift and reset operation of a shift register. According to the circuit of the invention, when frequency-halving is adopted, at least six flip flops and two gate circuits can be adopted to realize a clock state indicating function. The clock state indicating circuit has the advantages of simple structure, lower operation power consumption and the like.

PCT Attributes
Application Date2014-11-24
2016-06-22
Date Available2019-01-04
Application NumberCN201410679855.1
Open (Notice) NumberCN105703745A
Language中文
Contribution Rank1
Document Type专利
Identifierhttp://ir.sia.cn/handle/173321/19078
Collection工业控制网络与系统研究室
Affiliation中国科学院沈阳自动化研究所
Recommended Citation
GB/T 7714
谢闯,杨志家,王剑,等. 一种时钟状态指示电路及方法[P]. 2016-06-22.
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