| 一种面向WIA-PA系统级芯片的低功耗优化策略 | |
| Alternative Title | A Low-power Optimization Strategy for WIA-PA System on Chip |
谢闯1,2,3 ; 杨志家(1,2,); 王剑1,2
| |
| Department | 工业控制网络与系统研究室 |
| Source Publication | 信息与控制
 |
| ISSN | 1002-0411 |
| 2018 | |
| Volume | 47Issue:6Pages:713-721, 729 |
| Indexed By | CSCD |
| CSCD ID | CSCD:6404890 |
| Contribution Rank | 1 |
| Funding Organization | 国家科技重大专项资助项目( 2015ZX03003010) |
| Keyword | 工业过程无线网络标准 系统级芯片 低功耗设计 时钟域 电源管理单元 |
| Abstract | WIA-PA系统级芯片是WIA-PA设备的核心组件,在设备的整体功耗中占有较大的比重.根据WIA-PA设备的应用环境和工作特点,通过对多种低功耗优化方法进行分析,提出了一种面向WIA-PA系统级芯片的低功耗优化策略.该策略采用门控时钟、异步电路应用、系统级优化、工艺制程优选等多种方法,从不同电路类型、不同设计层次等多个维度考虑,最终达到对静态功耗和动态功耗两者共同优化的目的. WIA-PA系统级芯片先后完成2次流片:第1次完成功能验证,第2次实现了基于所提策略的低功耗优化.通过对2次流片样片的功耗测试数据进行分析和对比,优化后的样片对比优化前动态功耗降低了71.2%,静态功耗降低了99.5%.该对比结果证明了优化策略的有效性. |
| Other Abstract | The wireless networks for industrial automation process automation (WIA-PA) system on chip (SoC) is the core component of WIA-PA wireless devices and occupies a large proportion of the total power consumption of the device. According to the application environment and working characteristics of WIA-PA devices，we study a variety of low-power optimization methods and propose a comprehensive low-power optimization strategy for WIA-PA SoC． The strategy combines multiple methods，e.g., gate control clock，asynchronous circuit application，system-level optimization，and process optimization． In addition，the strategy achieves both static and dynamic power consumption optimization by considering different circuit types and design levels. WIA-PA SoC has been completed for two times of type-out. The first time completes functional verification，whereas the second time realizes the proposed low-power optimization． We test the sample chips two times. Experimental data of power consumption reveal that the dynamic power consumption of the optimized sample chip is reduced by 71．2% and the static power consumption is reduced by 99．5%． The comparison results demonstrate the effectiveness of the proposed optimization strategy. |
| Language | 中文 |
| Citation statistics | |
| Document Type | 期刊论文 |
| Identifier | http://ir.sia.cn/handle/173321/23881 |
| Collection | 工业控制网络与系统研究室 |
| Corresponding Author | 谢闯 |
| Affiliation | 1.中国科学院沈阳自动化研究所网络化控制系统重点实验室 2.中国科学院机器人与智能制造创新研究院 3.中国科学院大学 |
| Recommended Citation GB/T 7714 | 谢闯,杨志家(1,2,),王剑. 一种面向WIA-PA系统级芯片的低功耗优化策略[J]. 信息与控制,2018,47(6):713-721, 729. |
| APA | 谢闯,杨志家,&王剑.(2018).一种面向WIA-PA系统级芯片的低功耗优化策略.信息与控制,47(6),713-721, 729. |
| MLA | 谢闯,et al."一种面向WIA-PA系统级芯片的低功耗优化策略".信息与控制 47.6(2018):713-721, 729. |
| Files in This Item: | Download All | |||||
| File Name/Size | DocType | Version | Access | License | ||
| 一种面向WIA-PA系统级芯片的低功耗优（1693KB） | 期刊论文 | 作者接受稿 | 开放获取 | CC BY-NC-SA | View Download | |
Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.
Edit Comment