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Alternative TitleClock state indicating circuit and method
谢闯; 杨志家; 王剑; 董策; 段茂强; 吕岩; 张超
Rights Holder中国科学院沈阳自动化研究所
Patent Agent沈阳科苑专利商标代理有限公司 21002
Other AbstractThe invention relates to a clock state indicating circuit. The clock state indicating circuit includes a clock frequency dividing circuit, an edge correction circuit, an edge detection circuit and a shift register circuit, wherein the clock frequency dividing circuit is connected with the edge correction circuit, the edge correction circuit is connected with the edge detection circuit and the shift register circuit, and the edge detection circuit is connected with the shift register circuit. The method includes the following steps that: different frequency division clock signals and periodic reset signals are generated; and a clock state is indicated through the shift and reset operation of a shift register. According to the circuit of the invention, when frequency-halving is adopted, at least six flip flops and two gate circuits can be adopted to realize a clock state indicating function. The clock state indicating circuit has the advantages of simple structure, lower operation power consumption and the like.
PCT Attributes
Application Date2014-11-24
Date Available2019-01-04
Application NumberCN201410679855.1
Open (Notice) NumberCN105703745B
Contribution Rank1
Document Type专利
Recommended Citation
GB/T 7714
谢闯,杨志家,王剑,等. 一种时钟状态指示电路及方法[P]. 2016-06-22.
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