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题名:
A high performance architecture design of PLC dedicated processor
作者: Zeng ST(曾舒婷); Yang ZJ(杨志家)
作者部门: 工业信息学研究室
会议名称: 2010 3rd International Conference on Advanced Computer Theory and Engineering, ICACTE 2010
会议日期: August 20- 22, 2010
会议地点: Chengdu, China
会议主办者: Int. Assoc. Comput. Sci. Inf. Technol. (IACSIT)
会议录: ICACTE 2010 - 2010 3rd International Conference on Advanced Computer Theory and Engineering, Proceedings
会议录出版者: IEEE Computer Society
会议录出版地: Piscataway, NJ, USA
出版日期: 2010
页码: V2424-V2428
收录类别: EI
ISBN号: 978-1-4244-6540-8
关键词: Design ; Program processors
摘要: In order to improve the speed of executing PLC instructions, the high performance PLC processor is researched. The proposed high performance PLC dedicated processor consists of the general processor and the PLC application specific instruction set processor (ASIP), and regards the PLC ASIP as the core. In the PLC ASIP, four kinds of instruction formats and five kinds of instruction sets are designed. The architecture is designed to accelerate the instructions execution. The PLC ASIP can improve the speed of executing boo I instructions, load and store instructions and function block instructions, which occupy 70.4% frequency of PLC instructions. The general processor is used for compiling the PLC concurrent program, controlling the peripheral equipments and executing arithmetic instructions. The general processor and the PLC ASIP can execute concurrently, when executing instructions in the two processors are independent with each other. The proposed design helps to improve real-time performance, comparing to the traditional sequential execution of PLC program. To validate the advance of the proposed design, three ladder programs are compiled to the instruction set of diversified processor. Compared the number of compiled instructions of diversified processor, the number of compiled instructions of the PLC dedicated processor are smallest.
语种: 英语
产权排序: 1
EI收录号: 20104613373919
内容类型: 会议论文
URI标识: http://ir.sia.cn/handle/173321/8301
Appears in Collections:工业信息学研究室_会议论文

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Recommended Citation:
Zeng ST,Yang ZJ. A high performance architecture design of PLC dedicated processor[C]. 2010 3rd International Conference on Advanced Computer Theory and Engineering, ICACTE 2010. Chengdu, China. August 20- 22, 2010.A high performance architecture design of PLC dedicated processor.
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