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题名: NOC通信组件的设计和验证技术研究
其他题名: Design and Verification of Communication Components of Network on Chip
作者: 王剑
导师: 王宏
分类号: TP393
关键词: 片上网络 ; 片上网络适配器 ; 片上网络交换节点 ; 片上网络通信链路
索取号: TP393/W33/2010
学位专业: 机械电子工程
学位类别: 博士
答辩日期: 2010-05-28
授予单位: 中国科学院沈阳自动化研究所
学位授予地点: 中国科学院沈阳自动化研究所
作者部门: 工业信息学研究室
中文摘要: 片上网络是一种新型的片上互连技术,它将宏观计算机网络中的概念、模型和设计方法引入到芯片内部,很好的解决了传统共享总线结构通信效率低、开发时间长等问题,同时具有可重用性高、可扩展性强、无全局时钟开销等优点,是未来深亚微米超大规模SOC设计的首选互连结构。自本世纪初片上网络的概念提出以来,越来越多的研究机构意识到片上网络的自身优势,纷纷投入到片上网络的开发设计中,使其成为了一个十分活跃的学术前沿领域。        本文的研究内容包括片上网络通信组件的设计实现和片上网络通信体系的仿真验证,二者是设计基于片上网络的多处理器片上系统的先决条件,也是决定设计成败的关键因素。论文的主要工作和创新点如下: 1.定义片上网络通信协议,使其成为片上系统各模块之间数据传输的规范。采用协议分层的设计方法,对OSI模型进行精简,划分通信协议的层次,定义各层协议的功能。定义网络中的分组数据帧,并按照分组数据帧的功能和对传输性能的要求对其分类,给出各类型分组数据帧的帧结构。提出四类与数据传输密切相关的网络服务——读服务、写服务、连接建立服务和连接撤销服务,并定义它们的处理过程。 2.分析片上网络通信模型,提出了一种新颖的NUMA+NORMA通信模型,将块传输方式引入到NUMA模型中,有效提高数据通信效率。在该通信模型的基础上,开发设计了兼容OCP接口协议的片上网络适配器。根据网络适配器OCP接口类型的不同,将其分为主类型、从类型和混合型,研究各类型网络适配器的工作原理,提出其体系结构,并使用Veriolg语言实现RTL级设计。建立网络适配器传输延时的计算模型,分析传输延时对系统设计的影响。  3.设计并实现了支持多虚通道的片上网络通信链路。由于片上网络是一个全局异步、局部同步(GALS)的系统,各网络适配器与交换节点使用不同的工作时钟,所以提出了一种采用异步FIFO附加读写控制逻辑的电路结构,旨在实现不同时钟域之间准确的数据传输,避免亚稳态出现。提出了一种新颖的输入可配置Robin-Round仲裁器的电路结构。该电路结构可参数化配置输入请求的数量,实现了对多输入请求的公平仲裁。分析通信链路传输延时与输入输出端口工作时钟、缓冲队列深度和数据帧长度之间的关系,提出一种确定缓冲队列深度临界值的方法,用于指导系统设计。  4.提出了一种分布式连接建立机制,通过交换节点对连接建立请求帧和连接撤销请求帧的处理,为网络建立通信连接。该机制可有效解决集中式连接建立方式扩展性差,连接建立过程繁琐等问题。在此基础上,设计并实现了片上网络交换节点。该交换节点支持2维Mesh和Torus拓扑结构,采用确定性X-Y路由算法和Wormhole交换策略,能够同时满足GS服务和BE服务对网络数据通信的要求。 5.对各类型网络适配器、通信链路和交换节点的设计代码进行面向FPGA的综合,得出它们的资源占用率和最大工作时钟。分析综合结果,得出各通信组件设计参数和内部结构变化对其自身资源占用和最大工作时钟的影响规律。 6.建立网络性能评估参数计算模型,在网络性能评估性能参数与NOC各组件内部相关信号之间建立映射关系,获得各性能参数的计算公式。将网络性能评估参数计算模型集成到仿真验证系统中,使其在仿真过程中计算和统计网络通信的性能参数,反映系统运行过程中片上网络的通信状况。使用SystemC语言构建片上网络通信体系的事务级模型,初步研究片上网络的事务级验证。
英文摘要: Network on chip (NOC) is a new connection technology used on chip, which introduces the conception, model and methodology of the macro computers network into chip. NOC has more reutilization, high scalability and no cost of global clock. It solves the issue that the communication efficiency of traditional shared bus architecture is low and development time of traditional shared bus architecture is long, and will become the first choice of interconnect structure for the future deep sub-micron VLSI SOC design. Since the conception of the network on chip was proposed at the beginning of this century, more and more research institutions have been aware of the advantages of NOC and invested in the development of NOC design. NOC has become a great active academic frontier.  The content of this dissertation includes design and implementation of NOC communication components and verification of NOC communication architecture based on simulation. They are both the prerequisites of designing NOC based multi-processor SOC and the key factors that determine design success or not. The main contribution is as follows.   1.Define the on-chip communication protocol as a specification of data transmission between each module in SOC. The OSI 7-layer network model is reduced through layering approach to divide layer of communication protocol and define the function of each layer. The frame transmitting in the network is defined and classified by functions and transmission performance required. It is proposed four network services closely related with data transmission, namely, reading service, writing service, connection building service and connection withdrawing service, and the process of each service is defined.   2.Design NOC network adapter compatible with OCP interface protocol. It’s proposed a NUMA plus NORMA communication model which adapts burst transmission to improve transport efficiency. According to the type of OCP interface on the network adapter, the network adapter is categorized into master type, slave type and mixed type. Working principle and internal composition of various types of network adapters is studied and implemented at RTL-level using the Veriolg language.  3.Design and implement NOC linker which supports multi virtual channels. Since the network on chip is a global asynchronous local synchronous (GALS) system and network adapters and routers use different clocks, the NOC linker contains asynchronous FIFO and additional reading and writing control logic circuit to achieve accurate data transmission between different clock domains and avoid metastability appearance. It is also proposed a novel input configurable Robin-Round arbitrator to achieve multi requests fair arbitration.   4.Design and implement NOC router. The router supports 2-dimension Mesh and Torus topology and adopts X-Y routing algorithm and wormhole switching strategy. In order to meet the data transmission performance requirements of different applications, the NOC router provides two types of communications services : best-effort services (BE) and guaranteed service (GS), and uses connection-oriented mechanisms to achieve the GS frame transmission and connection-less mechanisms to achieve the BE frame transmission. GS frame has higher priority and preempts the bandwidth resources, bandwidth unused by GS data frame is used for the BE data frame transmission. A distributed connection establishment mechanism is proposed to set up and tear down guaranteed connections requested by master IP cores.  5.Synthesize the design codes of network adapter, router and linker based on FPGA and obtain their resources occupancy rate and the maximum operating clock. Based on preliminary analysis of synthesis result, the design parameters and internal structure change of various communication components that affect theirs own resource consumption and the maximum operating clock are found.  6.Using the SystemVerilog language to establish network on chip RTL simulation platform to verify NOC communication system and the function of communication components, then analyze communication performance parameters such as propagation delay, bandwidth and throughput; a transaction level model of network on chip which can be easily employed in a system-level system-on-chip simulation framework for early functional verification and architecture analysis is implemented in SystemC language for preliminary study of transaction level verification of network on chip.
语种: 中文
产权排序: 1
内容类型: 学位论文
URI标识: http://ir.sia.cn/handle/173321/9342
Appears in Collections:工业信息学研究室_学位论文

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Recommended Citation:
王剑.NOC通信组件的设计和验证技术研究.[博士学位论文].中国科学院沈阳自动化研究所.2010
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